EDN

Tracking PLL design through the decades, part 2

The desire to integrate more gateshas driven two advances in CMOS-processingtechnology, enabling the integrationof practical inductors in genericCMOS-logic processes. The first, theuse of CMP ...
Electronics Weekly

Analogue or digital in PLL design

The performance of analogue phase-locked loops (PLLs) has steadily improved with operating frequencies extending to 8GHz and beyond. Recently, digital PLLs based on direct digital synthesis (DDS) have ...
EDN

Freebie PLL design tool debuts with PLL hardware

Norwood, Mass.—RF chip maker Analog Devices, Inc. (ADI) is rolling out a new generation of its existing ADIsimPLL PLL (phased-locked loop) circuit design and evaluation tool, as well as two new PLL ...
Electronics Weekly

ADI increases options for PLL design

Analog Devices has announced ADIsimPLL Version 3.0, a new generation of its phase-locked loop (PLL) circuit design and evaluation tool, as well as two new PLL synthesisers for the upconversion and ...
Electronic Design

Smaller PLL Synthesizers Become Design-Friendlier

Phase-locked-loop (PLL) frequency synthesizers are signal sources often employed in many types of electronic equipment. They show up as clock sources in high-frequency instruments and as local ...
Electronic Design

Optimal Jitter Attenuation Starts With The Proper PLL Bandwidth

Clock signals provide reference timing to every integrated circuit and electrical system. Consumer applications typically use simple quartz crystals for reference clock generation. Other applications, ...
Design-Reuse

Ultra Low Jitter Wide Band LC PLL

The accelerating need for ever higher data rates and serial I/O density sets demanding performance requirements for current and next generation SerDes transceivers. Not only must they handle multiple ...
The Engineer

Revolution and Evolution in Frequency Synthesis: How PLL/VCO Technology Has Increased Performance, Decreased Size, and Simplified Design Cycle

Microwave frequency generation has posed significant challenges to engineers over the years, requiring in-depth knowledge of analog, digital, and radio frequency (RF) and microwave ...
Design-Reuse

Achieving Groundbreaking Performance with a Digital PLL

Digital PLLs outperform analog PLLs in jitter, phase noise, power, and die area. They also reduce migration risk and cost. They make integration and production test easy. Yet, they have not been ...
GPS World

Mitigation for Missiles: Fuzzy Logic and Intelligent Tracking Loops Cope with Interference

A fuzzy tracking system performs as a narrow bandwidth tracking system in terms of noise reduction, and a wide bandwidth tracking system in terms of dynamic response, overcoming the contradiction ...